A 64 Point Fourier Transform Chip
computer science crazy Super Moderator Posts: 3,048 Joined: Dec 2008 
17092009, 12:36 AM
A 64 Point Fourier Transform Chip Fourth generation wireless and mobile system are currently the focus of research and development. Broadband wireless system based on orthogonal frequency division multiplexing will allow packet based high data rate communication suitable for video transmission and mobile internet application. Considering this fact we proposed a data path architecture using dedicated hardwire for the baseband processor. The most computationally intensive part of such a high data rate system are the 64point inverse FFT in the transmit direction and the viterbi decoder in the receiver direction. Accordingly an appropriate design methodology for constructing them has to be chosen a) how much silicon area is needed b) how easily the particular architecture can be made flat for implementation in VLSI c) in actual implementation how many wire crossings and how many long wires carrying signals to remote parts of the design are necessary d) how small the power consumption can be .This paper describes a novel 64point FFT/IFFT processor which has been developed as part of a large research project and implimentation to develop a single chip wireless modem. ALGORITHM FORMULATION The discrete fourier transformation A® of a complex data sequence B(k) of length N where r, k ={0,1Â¦Â¦, N1} can be described as Where WN = e2?j/N . Let us consider that N=MT , ? = s+ Tt and k=l+Mm,where s,l ? {0,1Â¦..7} and m, t ? {0,1,Â¦.T1}. Applying these values in first equation and we get This shows that it is possible to realize the FFT of length N by first decomposing it to one M and one Tpoint FFT where N = MT, and combinig them. But this results in in a two dimensional instead of one dimensional structure of FFT. We can formulate 64point by considering M =T = 8 This shows that it is possible to express the 64point FFT in terms of a two dimensional structure of 8point FFTs plus 64 complex interdimensional constant multiplications. At first, appropriate data samples undergo an 8point FFT computation. However, the number of nontrivial multiplications required for each set of 8point FFT gets multiplied with 1. Eight such computations are needed to generate a full set of 64 intermediate data, which once again undergo a second 8point FFT operation . Like first 8point FFT for second 8point again such computions are required. Proper reshuffling of the data coming out from the second 8point FFT generates the final output of the 64point FFT . Fig. Signal flow graph of an 8point DIT FFT. For realization of 8point FFT using the conventional DIT does not need to use any multiplication operation. The constants to be multiplied for the first two columns of the 8point FFT structure are either 1 or j . In the third column, the multiplications of the constants are actually addition/subtraction operation followed multiplication of 1/?2 which can be easily realized by using only a hardwired shiftandadd operation. Thus an 8point FFT can be carried out without using any true digital multiplier and thus provide a way to realize a low power 64point FFT at reduced hardware cost. Since a basic 8point FFT does not need a true multiplier. On the other hand, the number of nontrivial complex multiplications for the conventional 64point radix2 DIT FFT is 66. Thus the present approach results in a reduction of about 26% for complex multiplication compared to that required in the conventional radix2 64point FFT. This reduction of arithmetic complexity furthur enhances the scope for realizing a lowpower 64point FFT processor. However, the arithmetic complexity of the proposed scheme is almost the same to that of radix4 FFT algorithm since the radix4 64point FFT algorithm needs 52 nontrivial complex multiplications. Use Search at http://topicideas.net/search.php wisely To Get Information About Project Topic and Seminar ideas with report/source code along pdf and ppt presenaion



computer science crazy Super Moderator Posts: 3,048 Joined: Dec 2008 
28112009, 07:37 PM
please use this link its ieee article , if you have ieee access please download (or ask your friends to give)
ieeexplore.ieeexpl/freeabs_all.jsp?isnumber=28416&arnumber=1269925&count=18&index=9 or use the similar articles to a new one cs.nctu.edu.tw/~ldvan/paper_list/A%20Low%20Power%2064Point%20FFT%20IFFT%20Deisng%20for%20IEEE%20802.11a%20WLAN%20Application.pdf groups.csail.mit.edu/cag/scale/papers/e_bashasm.pdf add.ece.ufl.edu/papers/fust.pdf Use Search at http://topicideas.net/search.php wisely To Get Information About Project Topic and Seminar ideas with report/source code along pdf and ppt presenaion



seminar paper Active In SP Posts: 6,455 Joined: Feb 2012 
03042012, 11:37 AM
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