computer science crazy|
Joined: Dec 2008
24-02-2009, 12:22 AM
Clock speeds are now in the gigahertz range and there is not much room for speedup before physical realities start to complicate things. With gigahertz clock powering a chip, signals barely have enough time to make it across the chip before the next clock tick. At this point, speeding up the clock frequency could become disastrous. This is where a chip that is not constricted by clock comes in to action. Clockless approach, which uses a technique known as asynchronous logic, differs from conventional computer circuit design in that the switching on and off of digital circuits is controlled individually by specific pieces of data rather than by a tyrannical clock that forces all of the millions of the circuits on a chip to march in unison. A major hindrance to the development of the clockless chips is the competitiveness of the computer industry. Presently, it is nearly impossible for companies to develop and manufacture a Clockless chip while keeping the cost reasonable. Another problem is that there arenÃƒÂ¢â€šÂ¬â€žÂ¢t much tools used to develop asynchronous chips. Until this is possible, Clockless chips will not be a major player in the market. In this seminar and presentation the topics covered are ÃƒÂ¢â€šÂ¬ general concept of asynchronous circuits, their design issues and types of design. The major designs discussed are Bounded delay method, Delay insensitive method & the Null Conventional Logic (NCL). The seminar and presentation also does a comparison of synchronous and asynchronous circuits and the applications in which asynchronous circuits are used.
Use Search at http://topicideas.net/search.php wisely To Get Information About Project Topic and Seminar ideas with report/source code along pdf and ppt presenaion
Active In SP
Joined: Feb 2012
14-02-2012, 02:29 PM
to get information about the topic Asynchronous cpu,clockless chip full report ,ppt and related topic refer the link bellow
topicideashow-to-a-seminar and presentation-report-on-clockless-chips
Joined: Apr 2012
10-10-2012, 11:46 AM
CLOCKLESSS.pptx (Size: 423.07 KB / Downloads: 21)
CLOCKLESSS CHIPS OR ASYNCHRONOUS CHIPS DON’T HAVE A GLOBAL CLOCK.
BUT THERE SHOULD BE SOME CONTROL MECHANISM INSTEAD OF GLOBAL CLOCK.
CLOCKED CHIPS OR SYNCHRONOUS CHIPS HAVE A GLOBAL CLOCK FOR CONTROLLING TIMING OF ENTIRE CHIP.
CLOCKLESS CHIP HAVE SOME ADVANTAGES LIKE:-LOW POWER CONSUMPTION,HIGH SPEED & LESS ELECTROMAGNETIC NOISE OVER CLOCKED CHIP.
CONCEPT OF CLOCK:-
CLOCK IS A TINY CRYSTAL OSCILLATOR.
CLOCK REGULATES THE RATE AT WHICH THE INSTRUCTION ARE EXECUTRD.THIS RATE IS KNOWN ASCLOCK RATE OR CLOCK SPEED.
THE CLOCK SPEED CAN BE EXPRESSED IN TERMS OF GIGA HERTZ & MEGA HERTZ.
ONE ADVANTAGE OF CLOCK IS THAT CLOCK SIGNALS TO VARIOUS COMPONENTS INSIDE A CHIP WHEN TO INPUT & OUTPUT CAN BE DETERMINED VERY EASY.
BECAUSE OF THIS CLOCK THERE SOME DISADVANTAGES LIKE:-HIGH POWER CONSUMPTION,LOW SPEED WHICH CAN BE OVERCOME BY CLOCKLESS CHIP.
SYNCHRONOUS CHIP :-
CHIP DESIGN VERY SIMPLE BECAUSE OF CLOCK.
WESTAGE OF COMPUTATIONAL TIME AFFECTS THE SPEED OF CHIP.
HIGHER POWER CONSUMPTION.
DESIGN OF COMPLEX CIRCUIT CAN’T BE DONE
BECAUSE OF HIGH POWER CONSUMPTION.
INTERFACING BETWEEN SYNCHRONOUS AND ASYNCHRONOUS.
:- MANY DEVICES AVAILABLE NOW ARE
SYNCHRONOUS IN NATURE.
:- SPECIAL CIRCUITS ARE NEEDED TO
LACK OF EXPERTISE.
LACK OF TOOLS.
ENGINEERS ARE NOT TRAINED IN THESE FIELD.
ACADEMICALLY,NO COURSE AVAILABLE.