CompactPCI
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electrical engineering
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29-12-2009, 01:44 PM



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Abstract

Compact peripheral component interconnect (CPCI) is an adaptation of the peripheral component interconnect (PCI) specification for industrial computer applications requiring a smaller, more robust mechanical form factor than the one defined for the desktop. CompactPCI is an open standard supported by the PCI Industrial Computer Manufacturerâ„¢s Group (PICMG). CompactPCI is best suited for small, high-speed industrial computing applications where transfers occur between a number of high-speed cards.

CompactPCI is a high-performance industrial bus that uses the Eurocard form factor and is fully compatible with the Enterprise Computer Telephony Forum (ECTF) computer telephony (CT) Bus„¢ H.110 standard specification. CompactPCI products make it possible for original equipment manufacturers (OEM), integrators, and resellers to build powerful and cost-effective solutions for telco networks, while using fewer development resources.


1. Introduction

Compact peripheral component interconnect (CPCI) is an adaptation of the peripheral component interconnect (PCI) specification for industrial computer applications requiring a smaller, more robust mechanical form factor than the one defined for the desktop. CompactPCI is an open standard supported by the PCI Industrial Computer Manufacturerâ„¢s Group (PICMG). CompactPCI is best suited for small, high-speed industrial computing applications where transfers occur between a number of high-speed cards.

It is a high-performance industrial bus that uses the Eurocard form factor and is fully compatible with the Enterprise Computer Telephony Forum(ECTF) computer telephony (CT) Bus„¢ H.110 standard specification. CompactPCI products make it possible for original equipment manufacturers (OEM), integrators, and resellers to build powerful and cost-effective solutions for telco networks, while using fewer development resources. CompactPCI products let developers scale their applications to the size, performance, maintenance, and reliability demands of telco environments by supporting the CT Bus, hot swap, administrative tools such as simple network management protocol (SNMP), and extensive system diagnostics. The move toward open, standards-based systems has revolutionized the computer telephony (CT) industry. There are a number of reasons for these changes. Open systems have benefited from improvements in personal computer (PC) hardware and software, as well as from advances in digital signal processing (DSP) technology. As a result, flexible, high performance systems are scalable to thousands of ports while remaining cost effective for use in telco networks. In addition, fault-tolerant chassis, distributed software architecture, and N+1 redundancy have succeeded in meeting the demanding reliability requirements of network operators.

One of the remaining hurdles facing open CT systems is serviceability. CT systems used in public networks must be extremely reliable and easy to repair without system downtime. In addition, network operation requires first-rate administrative and diagnostic capabilities to keep services up and running.



2. The CompactPCI Standard


The Peripheral Component Interconnect Industrial Computer Manufacturerâ„¢s Group (PICMG) developed the compact peripheral component interconnect (CompactPCI) specification in 1994. CompactPCI is a high-performance industrial bus based on the peripheral component interconnect (PCI) electrical standard. It uses the Eurocard form factor first popularized by VersaModule-Eurocard (VME). Compared to the standard PCI desktop computer, CompactPCI supports twice as many PCI slots (eight) on a single system bus. In addition, CompactPCI boards are inserted from the front of the chassis and can route input/output (I/O) through the backplane to the back of the chassis. These design considerations make CompactPCI ideal for telco environments.



System Bus Comparison



Features VME CompactPCI PCI ISA
Address Space (Physical) 4GB 4GB 4GB 1 or 16MB
Addressing Mode Geographic Slot Sensitive or Geographic Slot Sensitive Board locator technology (BLT)
CPUs in System Multiple 1(Master) 1(Master) 1
Hot Swap VITA 1.4-199 PICMG hotswap PCISIG hotplug Not supported
System Bandwidth 40-80 Mbps 132 Mbps 132 Mbps 8 Mbps








3. Fundamental Components

CompactPCI offers a substantial number of benefits for developers interested in building telco-grade applications. CompactPCI systems offer the durability and maintainability required for network applications. At the same time, they can be built using standard, off-the-shelf components and can run almost any operating system and thousands of existing software applications without modification. Other advantages of CompactPCI are related to its Eurocard form factor, durable and rugged design, hot swap capability, and compatibility with the CT Bus.

Eurocard Form Factor

CompactPCI boards use the Eurocard form factor, field-proven for use in telco applications worldwide.

¢ Two card sizes are available:
o 3U (100 mm × 160 mm) with single 220-pin connector
o 6U (160 mm × 233 mm) can support up to three additional connectors
¢ Separates the boards from the cables
o Boards are designed for front loading and removal
o No need to disconnect and reconnect cables when replacing a failed network board
o Reduces the chance of disrupting other cables and boards inside the chassis
¢ Outwardly exposed lights
o Lights are visible to maintenance staff
o Faulty boards or boards without power can easily be detected and replaced
o Lights may provide diagnostic information such as failure of self tests
¢ High densities in a compact server
o Size of boards and optimal spacing means more resources in smaller package
¢ Vertically spaced boards
o Vertical spacing provides more efficient cooling because hot air flows upward

Rugged and Durable Design

The CompactPCI system architecture was specifically designed with telco environments in mind resulting in a network-equipment building standards (NEBS)“compliant, durable, and rugged form factor.

¢ Boards are held firmly in place by their connectors, guides on both sides, and a metal face plate that screws or latches onto the cage.
¢ Pin and socket connectors on the boards are more reliable and have better shock and vibration characteristics than other form factors, such as PCI.
¢ I/O cables are in the rear of the chassis, where they are less liable to accidental interference.


CT (Computer Telephony) Bus

The CT Bus is a time division multiplex (TDM) bus that provides 1024, 2048, or 4096 time slots for exchanging voice, fax, or other network resources on the CompactPCI backplane. The CT Bus lets developers build large, distributed, open CT systems in public network and customer-premises environments. The particular value attached to CompactPCI by the CT industry is closely connected to the development of interoperability standards. Both the SCbus„¢ and multivendor integration protocol (MVIP)“90„¢ were developed to let CT applications control resource boards (voice, fax, text-to-speech, etc.) without occupying the system bus. This allowed greater speed, efficiency, and scale in application design and propelled a new wave of CT services. The Enterprise Computer Telephony Forum (ECTF) then developed the H.100 hardware compatibility specification that defined the CT Bus, a high-performance mezzanine bus. The CT Bus works with both SCbus“ and MVIP“compatible products. The ECTF implementation of the CT Bus for CompactPCI bus is called the H.110 standard.





4. CompactPCI Features

¢ CompactPCI devices are fully compliant with PCI rev. 2.0.
¢ CompactPCI uses standard PCI chip sets.
¢ CompactPCI uses a passive backplane architecture.
¢ CompactPCI is processor independent.
¢ CompactPCI provides plug-and-play facilities.
¢ CompactPCI uses an industrial card format.
¢ CompactPCI uses a high-density pin and socket connector.
¢ CompactPCI maximizes the number of PCI slots.
¢ CompactPCI defines a hot-swapping mechanism.
¢ CompactPCI can bridge to other PCI bus and I/O buses (G-64, VME, subscriber trunk dialing [STD]).

5. The PCI Advantage


The PCI bus has been defined by Intel as a local bus providing an ultra-fast direct link between the CPU and high-speed peripherals devices. PCI has been adopted by every CPU manufacturer and is at the core of all modern Intel Pentium, Digital Equipment Corporation (DEC) Alpha, and IBM/Motorola PowerPC systems.

High Performance

¢ 32-bit and 64-bit bus with peak bandwidth at 264 Mbps
¢ Concurrent processing with processor/memory subsystems
¢ Synchronous bus operation at a 25 to 33 MHz clock
¢ Low power consumption (5V or 3.3V technology)


Low Cost

¢ Optimized for direct interconnection of PCI chips to the bus
¢ Multiplexed architecture reduces pin count and package size
¢ Mass-produced components with decreasing selling price



Easy to Use

¢ PCI peripheral boards contain configuration for automatic plug-and play
¢ PCI bus topology can be expanded using transparent PCI“to“PCI bridges
¢ Hidden overlapped central arbitration
¢ Broad operating system and application software support


Industrial Form Factor

Industrial computers must be capable of operating reliably in the most demanding environment. They should tolerate heat, dirt, and high shocks and vibrations, with meantime between failures (MTBF) measured in tens of thousands of hours. CompactPCI defines a single or double Eurocard (3U or 6U) board format. Boards mount vertically for best cooling characteristics, with card extractors and user I/O connectors in the front of the card. CompactPCI uses a standard Eurocard chassis available from many vendors.

Eurocard Chassis




High-Density Connector

The CompactPCI connector, standardized by International Electro technical Commission (IEC)“1076-4, is widely used in the telecommunication industry and is available from several leading manufacturers (AMP, ERNI). The 235 pins (47 pins by five rows) of the CompactPCI connector include all the PCI signals (32 bit and 64 bit) and 40 pins reserved for future extension. A 3.3V/5V keying mechanism prevents incorrect insertion and accidental damage.

Hot Swapping/Live Insertion

The CompactPCI specification accommodates a methodology for live insertion and removal of the boards while the system is operating. Hot swapping is achieved using staged pins for power and PCI signals. This feature allows the maintenance and the upgrade of a system while running.

An Ideal Industrial System Solution

CompactPCI rack enclosures combine small and sturdy packaging, making them ideally suited for embedded and industrial applications. GESPAC rack enclosures also have the electromagnetic compatibility (EMC) approval according to the European legislation. CompactPCI systems use small and rugged 3U Eurocard enclosures with swappable power supplies, fan units, and a four-to-eight-slot CompactPCI backplane. Wider enclosures (up to 19 inches) are available for I/O“intensive systems.

















6. CompactPCI as the Solution for the Next
Generation of Computer Telephony
Integration (CTI)


Over the years, various standards and specifications have been adopted to propel CTI technology. Recently, a new generation of standards emerged, at the forefront of which is CompactPCI. CompactPCI is a new standard for computer backplane architecture and peripheral integration, defined and developed by the peripheral component interconnect (PCI) industrial computers manufacturers group (PICMG) and capable of dramatically raising the stakes in the world of computer telephony. Combining the practicalities and real-world economics of the conventional personal computer (PC) world with the kind of features long-demanded by telcos, CompactPCI sets the standard for a new generation of CTI products. For the first time, integrators can cheaply and efficiently build rugged, high-density systems with the added advantage of hot swappability.

1. A New Standard emerges

CompactPCI and PCI technologies have emerged from the search for a standard interface between peripherals on PC“compatible CPUs and backplanes. In keeping with the requirements for true interoperability, the PICMG, which is an independent and cooperative consortium of vendors and manufacturers, has overseen the development of these specifications.

The PICMG is primarily focused on the evolution and development of specifications for PCI and CompactPCI products, and the diversity of membership ensures that all interested parties can be represented and that interoperability can be maintained to produce a common specification, accessible to all. PICMG specifications define hardware practices. Software communication and bus architecture, however, have been defined by a second independent interest group, the Enterprise Computer Telephony Forum (ECTF). The ECTF was founded to converge the plethora of competing standards for computer telephony (CT) buses and to improve interoperability between manufacturers. Essential to this process is introducing better notions of scalability, so that solutions can be built to serve the needs of different environments while utilizing the same core technology. To this end, the ECTF has produced two specifications for hardware and software bus interfaces: H.100 and H.110, also known as CT buses. The two organizations work in tandem to develop all aspects of the CompactPCI standard.

2. The CompactPCI Backplane

As indicated, the backplane is crucial to any scalable system. CompactPCI defines a new backplane technology that confers a number of key benefits to manufacturers. These benefits are based upon the combination of three key factors:

¢ PCI silicon support
¢ 2-mm standard personal identification number (PIN) connectors
¢ large form factor

The PCI standard is a bus standard developed for PCs by Intel that can transfer data between the CPU and card peripherals at much faster rates than are possible via the ISA us (e.g., about 132 Mbps as opposed to 5 Mbps). PCI was originally designed for standardizing the interfaces available on chips to be used on PC“compatible peripherals and was unique in that it utilized silicon. Importantly, PCI was designed with limitations to the maximum capacity of the bus and to the electrical loading it would require. These considerations helped minimize the costs of the bus interface.

PCI was rapidly adopted by other vendors and became the most common bus interface for such chips. Despite becoming the established interface, offering high-speed data transfer, PCI lacked the higher density available from systems utilizing VME, as only four cards could be supported within a system. CompactPCI was a solution to this set of problems, given that it adopted the proven European form factor successfully utilized in VME systems.
CompactPCI uses a vertically mounted backplane consisting of five connectors, as is defined in the PICMG's CompactPCI specification 2.0. This method of mounting is significantly more robust that that available from a standard PC and also provides better access for cooling because air can flow past more easily. Telecommunications applications often require the use of large amounts of digital signal processors (DSPs), which are usually heat intensive; thus, cooling is essential. Cards are inserted into the physical bus interface from the front of the unit, enabling straightforward access. Furthermore, the vertically orientated bus provides the possibility of access from two sides. All in all, a CompactPCI chassis offers a rugged, secure, and highly reliable platform in which to insert communications cards for demanding applications.

3. Connectivity and Capacity

CompactPCI cards can come in two different sizes (3U or 6U), but the standard defines a common physical design. There are a number of physical connectors utilized to support integration to the physical bus itself. Although different connectors are used in each version due to size discrepancies, each connector serves a specific purpose and contains a specific number of 2-mm pins (535 in all). The standard for pin connectivity was originally developed by Siemens and confers several advantages:
¢ power and grounding access
¢ high signal integrity
¢ minimal noise loss
¢ minimal noise susceptibility

This rigid definition is in contrast with the multiplicity of arrangements that have existed in previous systems and further assists the interoperability of the standard.

Figure 2. Rigid Definition




There are five connectors in total. J1 always acts as the 32-bit PCI bus interface. This is used by both the 3U and 6U board versions. J3, J4, and J5 are allocated for input and output signal distribution and, amongst them, offer a total of 315 2-mm connector ins. They are not present on 3U“card varieties. J2 offers an additional 32-bit bus interface as an option. Hence, when it is utilized, a total bus of 64-bits is available. Taken together, J1 and J2 constitute the CompactPCI bus and J3, J4, and J5 constitute the local or sub-bus. The sub-bus may itself be broken down, given that J4 specifically provides access to the H.110 bus, while J5 provides access to other external input and output signals. J5 will be explored in more detail in subsequent sections. This sub-bus enables multiple boards to communicate with each other quickly and efficiently. In telephony applications, this is particularly important, as it allows rapid transfer of data between cards in a system. Furthermore, the simplicity of design is in contrast to the complexity of ISA or VME systems.

Figure 3. Simplicity of Design

In addition to the allocation of connectors to the computer telephony and CompactPCI buses, specifications also require the addition of mezzanine-type daughter boards to individual CompactPCI cards. This allows CompactPCI cards to support higher processor or chip density to host DSP chips for advanced telephony applications. Associated with the connector design, the Institute of Electrical and Electronic Engineers (IEEE) specification 1101.11, known as rear panel“transition module, has been incorporated into the CompactPCI standard. This standard requires permanent or semi permanent connectivity of inputs and outputs and gives mechanical definition to the strong grounding and shielding practices of electrical components. This is particularly important when one considers the demanding electromagnetic capability (EMC) and safety legislation now enforced by governments around the world.
The CompactPCI specification also provides a mechanism that identifies the physical position of each card and maps it into software. Thus, any one card has knowledge of the inputs and outputs, internal and physical, to which it is connected (assuming that the software is correct). Specification 1101.11 also permits specific slots to be assigned to specific cards, should this be a requirement. At present, the physical capacity of the CompactPCI bus is limited. It can support up to eight cards, which, if one is designated the CPU, leaves seven slots free for peripheral cards. Because CompactPCI's tremendous potential for telecommunications applications was soon recognized, a standard that specifically defines how CompactPCI systems should use the H.110 bus was originated. Known as the computer telephony specification or PICMG 2.5, it complements other CompactPCI specifications. Theoretically, this standard enables up to sixteen E1 or T1 PCMs to be terminated on a single CompactPCI card. It also suggests that up to twenty slots could be available in a single chassis, which would have the net result of allowing 320 E1 or T1s to be switched in a single unit. The largest ISA“based systems could only support thirty-two E1 or T1 terminations in a single chassis.
Although such a scenario is not presently possible, it does serve as an indication of the tremendous potential of CompactPCI to permit the design of high-density applications at low cost. However, work is underway in providing physical bridges between each CompactPCI cluster of eight cards. Such systems would combine multiple clusters in a single chassis. A final consideration for capacity is the switching bandwidth of the H.110 CT bus itself. This has a maximum capacity of 4096 bidirectional timeslots, each with a capacity of 64 kbps. In other words, 2048 duplex call paths may be established across a single H.110 bus. This bus acts a time-division multiplexer (TDM) by supporting the transmission of various kinds of signals over the same transmission medium.

4. The Hot Swappability Revolution

One of the principal innovations of the CompactPCI standard is its introduction of hot swappability (hot swap) to CTI products. This, combined with effective simplicity and interoperability, explains the widespread appeal of the technology. Up until this point in time, hot swap has been an asset demanded by telcos that simply could not be delivered by suppliers of PC“based CTI solutions. Available on VME in a complex implementation and not to an open standard, previous solutions have been costly and manufacturer specific. It was believed that the barrier between hot-swap and PC“based CTI solutions was unbridgeable. Now, however, CompactPCI allows true fault tolerance and security to be achieved through low cost, manageable solutions.
All large, central office (CO)“type switches are expected to have hot swappability to permit the kind of fault-tolerant architecture and reliability the telecommunications industry demands. At a stroke, CTI applications gain long denied credibility throughout the industry. Hot swappability or live insertion is defined as the ability to insert or remove a process card from a live system. This process places several requirements on the developer. Firstly, the procedure must be safe; a live system is, by definition, one that requires power to run an application process. Secondly, the removal or insertion of a card into the system must not cause any disruption to the ongoing processes of the application, such as switch failure. Thirdly, taking the card in and out of the system must not itself be affected by this action. Although the requirements are straightforward, they have been impossible to achieve using standard PC architectures. How, then, does CompactPCI resolve this problem?
In fact, the hot-swap standard generated by PICMG known as PICMG 2.1, is relatively simple and defines a manual procedure by which hot swap can be achieved. The procedure involves hardware and software processes linked to electrical signals and can be implemented by all manufacturers, provided that they follow the appropriate guidelines. The procedure is dependent on several key factors. First, the silicon chips utilized by the PCI“bus architecture must be able to communicate directly with each other, not via the mediation of hardware buffers. The chips achieve a state in which their signals can be synchronized with those of the backplane. Because nothing exists between the two, synchronization may occur quickly, although the lack of mediation buffers means that the electrical loading of the bus must be precisely monitored to maintain a synchronous state. Second, the pin connectors between the CompactPCI card and the mating contacts on the CompactPCI bus are designed to be of variable length. Given this situation, certain pins will make contact with their respective mate before others do or, conversely, lose contact before others do so. Finally, each card is secured in place via a lever that clips into position at the front or rear of the chassis unit. The procedure essentially follows a predictable sequence. When a card is selected for extraction, the lever is raised or released. This action breaks a contact on some associated circuitry and sends a signal to the controlling software, which, in turn, signals that a particular card is being prepared for extraction. Hence, the system can redirect processes elsewhere. Once the withdrawal process begins, certain pins will lose contact with their mates before others. In fact, there are three lengths defined by the standard. The shortest will obviously lose contact first, which sends a signal to the control system indicating that the card is being removed. Thus, power-down procedures can be initiated. When a card is being inserted, the longest pins make contact first, thereby generating a signal that instructs the system to begin delivering power to the card. As the shortest make contact, further signals are generated that inform the system that the board is now fully in place and that all of the power-up procedures can be completed. The medium-length pins make contact as the initial charges are being applied to the card, and the PCI chip resumes operation. Closure of the security lever completes the process.
The PICMG specification defines the signals associated with each event that developers use to build hot swappability into their applications. This activity demands close monitoring at a high level to ensure that any applications in service take all necessary actions to divert resources away from the removed card or to allocate resources to an inserted card. Thus, developers must be extremely diligent.
A further consideration involves timing. All telecommunications systems are either synchronized to an external clock source or generate a clock source that must be distributed to other equipment via the telecommunications network.
Telecommunications equipment does not usually accommodate several clock sources. If the card to be removed is the card that is responsible for distributing the timing signal across the system, synchronization may be lost, causing the system to run free. However, the CompactPCI bus enables the reception of two timing signals. Hence, if one source is lost, a secondary source can be provided to ensure that the system remains appropriately synchronized.
In mission-critical systems such as those experienced in the telecommunications industry, such capabilities have great importance, and their availability in such systems will undoubtedly prove to be revolutionary.


5. Software, Integration, and Processes

The CompactPCI backplane acts as a seamless connection between all peripherals attached to it. The CPU and all other PCI“compatible chips appear as resources common to the entire system, while peripheral chips appear to system software as though they are co-located with chips on the CPU of a standard PC. This situation has several implications.
First, it means that no barrier exists to running software and processes that have evolved in the desktop world on CompactPCI systems; software can readily be ported from one platform to another, which represents an essential savings in time and money. Second, provided a peripheral is CompactPCI compliant, it can be integrated into a CompactPCI platform. Integrators can simply choose devices from a vast array of vendors and plug them into their systems. In telecommunications applications, a wide variety of interfaces can be supported on the same platform, as they simply become resources within the same system and peripherals to the CompactPCI bus.
A further benefit is the fact that a wide range of operating systems can be supported within a CompactPCI system. Most operating systems that run on a PC will run on CompactPCI systems without further modification. Furthermore, developers can select the processor they require based on preference alone. This wide range of compatibility makes it a relatively straightforward task for developers to build CompactPCI systems or to transfer from one technology to another. It also confers a degree of future proofing to system design. Because all system components are peripherals of the CompactPCI bus, individual components may readily be replaced without causing disruption to the system as a whole.
Given the capabilities of this new technology, it is useful to review the applications to which it can be directed. As previously indicated, PC“based systems built around various kinds of network interfaces (e.g., E1, T1, asynchronous transfer mode [ATM], and IP) are already common. Despite their ever-growing sophistication, reliability, and cost effectiveness, such systems have not always been validated by certain sections of the industry. Conversely, other parties have cheerfully accepted the limitations of such systems. Developers have been positioned somewhere in between, trying to reconcile the demands of each community”on the one hand for cost-effective functionality and on the other for telco-grade reliability.
There is no doubt that PC solutions have answered many of the arguments against them, but objections will still be raised in some quarters. However, CompactPCI changes all of this. It offers the best of both worlds (i.e., the opportunity to develop complex systems in a cost-effective manner while addressing the issues of reliability that are raised against the PC world).
Developers have a tremendous opportunity to offer telco-grade equipment using technologies that have evolved from PCs. Rugged, fault-tolerant, reliable, and high-density applications can readily be implemented. CompactPCI may be anticipated in all areas of the telecommunications network, and as more and more networks are rolled out by more and more operators, cost considerations will surely force purchasers in the direction of systems designed using this new technology.
The first system to offer hot swap as a truly open standard, CompactPCI is indeed revolutionary.
















7. Conclusion



With global deregulation, an expanding worldwide telecommunications infrastructure, and the explosive growth rate of technologies such as wireless and the Internet, CT developers are looking increasingly to the public network for opportunities. However, entering this market means having to adapt to stringent serviceability requirements. CompactPCI, with its Eurocard form factor, hotswap capabilities, and durability, solves this problem while delivering all the benefits of CT integration.

















References


Books / Articles:

Harrison, D.K. & Honey, J. CompactPCI System Management, CompactPCI Systems
Bigelow PC Troubleshooting and Maintenance

Websites / Online articles:

ieee.org
iec.org
compactpci.com








Acknowledgement

I extend my sincere thanks to Prof. P.V.Abdul Hameed, Head of the Department for providing me with the guidance and facilities for the Seminar.

I express my sincere gratitude to Seminar coordinator Mr. Berly C.J, Staff in charge, for their cooperation and guidance for preparing and presenting this seminar and presentation.

I also extend my sincere thanks to all other faculty members of Electronics and Communication Department and my friends for their support and encouragement.

DON NAVEEN. A
















Contents


¢ INTRODUCTION 01
¢ THE COMPACTPCI STANDARD 02
¢ FUNDAMENTAL COMPONENTS 03
¢ COMPACTPCI FEATURES 05
¢ ,THE PCI ADVANTAGE 05
¢ COMPACTPCI AS THE SOLUTION FOR THE NEXT 0
GENERATION OF COMPUTER TELEPHONY
INTEGRATION (CTI) 08

¢ CONCLUSION 17
¢ REFERENCES 18
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