Design and Optimization of Reversible BCD Adder/Subtractor Circuit for Quantum and Na
Thread Rating:
  • 1 Vote(s) - 5 Average
  • 1
  • 2
  • 3
  • 4
  • 5
seminar class
Active In SP

Posts: 5,361
Joined: Feb 2011
16-02-2011, 10:23 AM

Decimal arithmetic has found promising uses in thefinancial and commercial applications. This is due tothe precise calculations required in these applications asoppose to binary arithmetic where some of decimalfractions can not be represented precisely [1]. Thesoftware implementation of decimal arithmeticeliminates these conversion errors, but it is typically100 to 1000 times slower than binary arithmetic. Thisattracts the attention of hardware designers to add adecimal arithmetic unit to CPUs to perform decimalcalculations [2].Energy loss on the other hand, is an importantconsideration in a binary arithmetic circuit. Part of theproblem of energy dissipation is related to non-ideal oftransistors and materials. Higher level of integrationand the use of new fabrication processes have reducedthe heat loss over the last decades. Another problemarises from Landauer’s principles [3] state that, logiccomputations that are not reversible, necessarilygenerate heat KT.ln2 for every bits of information thatis lost, where K is the Boltzmann’s constant and T isthe temperature. Reversible are circuits (gates) in whichthere is a one-to-one mapping between vectors of inputsand outputs. The reversible designs do not lose anyinformation. Reversible logic circuits have found promisingattention in nanotechnology 0[4], quantum computingand low power CMOS designs. Some reversible logiccircuit synthesis methods are proposed in the literature[8, 14]0. Genetic Algorithm (GA) is also used tosynthesize and optimize a reversible or quantum logiccircuit 0[15,12]. Don’t cares (DCs) can be managed inGA-based methods. Some works are also done onreversible BCD adder design and optimization[5, 6, 11, 13].From the point of view of reversible logiccircuits, there are some factors as the complexitymeasures of a circuit, namely, the number of the gates,the number of garbage inputs/outputs and the quantumcost. In this paper, a reversible Binary Coded Decimal(BCD) adder/subtractor has been designed andoptimized by using GA and DC concept in the sense ofabove factors.The structure of this paper is as follows: First weexplain the background including BCD adders,reversible logic circuits, genetic algorithms andtheir application in the synthesis of circuits and DCs(Don’t Cares) in reversible and quantum logic circuits.Then the main contribution of paper is presented.We used the BCD adder to construct a BCDadder/subtractor. Conclusions and references are alsoprovided.
Before that we propose the method isused in this paper some background information isneeded. These are information about BCD adders,reversible logic, using genetic algorithms to synthesizea reversible circuit and the DC concept.
BCD adders:
Figure 1 illustrates three parts of a BCDadder: 4-bit binary adder, over 9 detection unit andcorrection unit. The first part is a binary adder whichperforms on two four-bit BCD digits and a one-bit carryinput. In the second part, the over-9-detector recognizesif the result of the first part is more than 9 or not.Finally, in the third part, if the output of detector (Pflag) is '1', the sum is added by 6, else do nothing. Aconventional BCD adder is shown in Fig. 2.The 4-bit binary adder is cascade of 4 FAs (4-bitcarry-propagate adder). The detection part in Fig. 2 isconstructed by using two AND gates (A1, A2) and oneOR gate. The correction unit adds ‘0’ to the binarynumber if the binary result is less than 10 and adds 6 tothe binary result if it is more than 9.A binary full adder is a basic circuit for designingbinary arithmetic units such as n-bit binary adder,subtractor and multiplier. In the same sense a BCDadder/subtractor is a basic circuit for designing BCDarithmetic units such as BCD n-digit adder/ subtractor,BCD multiplier and so on.
Reversible gates and circuits:
A function or a circuitis reversible if there is a one-to-one correspondencebetween its input and output assignments [13]. Classicalreversible logic gates can be implemented in varioustechnologies such as CMOS, optical andnanotechnology. Quantum gates, on the other hand, acton qubits. A qubit is a unit of quantum information.Generally, quantum gates cannot be implemented usingconventional technologies such as CMOS.A reversible gate has an equal number of inputsand outputs. Generally, with n inputs, there exist (2n)!

download full report

Important Note..!

If you are not satisfied with above reply ,..Please


So that we will collect data for you and will made reply to the request....OR try below "QUICK REPLY" box to add a reply to this page

Quick Reply
Type your reply to this message here.

Image Verification
Please enter the text contained within the image into the text box below it. This process is used to prevent automated spam bots.
Image Verification
(case insensitive)

Possibly Related Threads...
Thread Author Replies Views Last Post
Last Post: seminar poster
  Design of an Error Detection and Data Recovery Architecture for Motion Estimation seminar projects maker 0 768 30-09-2013, 04:40 PM
Last Post: seminar projects maker
  Ant Colony Optimization PPT seminar projects maker 0 343 26-09-2013, 04:22 PM
Last Post: seminar projects maker
  Reverse Engineering and Part Design Report seminar projects maker 0 332 13-09-2013, 11:52 AM
Last Post: seminar projects maker
  CHAOTIC QUANTUM CRYPTOGRAPHY pdf study tips 0 326 09-09-2013, 03:31 PM
Last Post: study tips
  LIBRARY MANAGEMENT SYSTEM: DESIGN AND IMPLEMENTATION pdf study tips 1 776 29-08-2013, 02:38 PM
Last Post: study tips
  Radiation optimization and image processing algorithms in the identi- fication study tips 0 291 20-08-2013, 04:28 PM
Last Post: study tips
  Computer Aided Design/Computer Aided Manufacture/Computer Integrated Manufacture PPT study tips 0 392 12-08-2013, 04:19 PM
Last Post: study tips
  Design and Implementation of Improved Authentication System for Android pdf study tips 0 419 12-07-2013, 03:14 PM
Last Post: study tips
  Design, Implementation, and Performance of a Load Balancer for SIP Server pdf study tips 0 621 05-07-2013, 03:12 PM
Last Post: study tips