PSOC(programmable system on a chip)
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11-07-2010, 09:03 AM

pls provide a full seminar and presentation report on psoc .
psoc details,architecture,diagrams etc

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pls put a seminar and presentation report on SET-TOP BOX or mail to handcphotostattly[at] u
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21-09-2010, 10:39 AM

there are some related threads from which you can collect more details about 'PSOC(programmable system on a chip)'

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16-05-2013, 02:38 PM


.docx   PSoC.docx (Size: 89.99 KB / Downloads: 13)


PSoC devices

PSoC is a software configured, mixed-signal array with a built-in MCU core. There are three different families of devices (2012):
• CY8C2xxxx series - Named 'PSoC 1' with CPU M8C
• CY8C3xxxx series - Named 'PSoC 3' with CPU 8051
• CY8C5xxxx series - Named 'PSoC 5' with CPU ARM Cortex M3
PSoC has three separate memory spaces: paged SRAM for data, Flash memory for instructions and fixed data, and I/O Registers for controlling and accessing the configurable logic blocks and functions. The device is created using SONOS technology.
PSoC resembles an ASIC: blocks can be assigned a wide range of functions and interconnected on-chip. Unlike an ASIC, there is no special manufacturing process required to create the custom configuration - only startup code that is created by Cypress' PSoC Designer for PSoC 1 or PSoC Creator for PSoC 3 and PSoC 5 IDE.
PSoC resembles an FPGA in that at power up it must be configured, but this configuration occurs by loading instructions from the built-in Flash memory.
PSoC most closely resembles a microcontroller combined with a PLD and programmable analog. Code is executed to interact with the user-specified peripheral functions (called "Components"), using automatically generated APIs and interrupt routines. PSoC Designer for PSoC 1 and PSoC Creator for PSoC 3 and PSoC 5 generate the startup configuration code. Both integrate APIs that initialize the user selected components upon the users needs in a Visual-Studio-like GUI.

PSoC software

PSoC Designer

This is the first generation software IDE to design and debug and program the PSoC 1 devices. It introduced unique features including a library of pre-characterized analog and digital peripherals in a drag-and-drop design environment which could then be customized to specific design needs by leveraging the dynamically generated API libraries of code.

PSoC Creator

PSoC Creator is the second generation software IDE to design debug and program the PSoC 3 and PSoC 5 devices. The development IDE is combined with an easy to use graphical design editor to form a powerful hardware/software co-design environment. PSoC Creator consists of two basic building blocks. The program that allows the user to select, configure and connect existing circuits on the chip and the components which are the equivalent of peripherals on MCUs. What makes PSoC intriguing is the possibility to create own application specific peripherals in hardware. On top of that, Cypress publishes component packs several times a year. Basically PSoC users get new peripherals for their existing hardware without being charged or having to buy new hardware. PSoC Creator also lets users connect any peripheral to any pin (except supply pins).

The core

The PSoC 1 core includes:

• The M8C MCU
• Flash memory
• Sleep and watchdog timers
• Multiple clock sources that include a PLL
• Internal main and low-speed oscillator
• External crystal oscillator for precision, programmable clocking
PSoC 1 devices can have up to two multiply–accumulate modules (MACs), which provide fast 8-bit multipliers or fast 8-bit multipliers with 32-bit accumulate, up to two decimators for digital signal processing applications, I2C functionality for implementing either I2C slave or master, and availability of a full-speed USB interface.

Programmable routing and interconnect

PSoC mixed-signal arrays' flexible routing allows designers to route signals to and from I/O pins more freely than with many competing microcontrollers. Global buses allow for signal multiplexing and for performing logic operations. Cypress suggests that this allows designers to configure a design and make improvements more easily and faster and with fewer PCB redesigns than a digital logic gate approach or competing microcontrollers with more fixed function pins.

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