design a carry propogation adder
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Thanush
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#1
23-03-2010, 06:43 PM


Plz help n thiz project and implimentation


thankz
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#2
09-05-2011, 03:07 PM


.ppt   Hinger.ppt (Size: 137 KB / Downloads: 85)



CARRY PROPAGATE ADDER
AMIT HINGHER
Computational Engineering

Basic Principle of a CPA..

Adds two n-bit operands A = (an-1..a0), B=(bn-1..b0) and an optional carry-in cin by performing carry propagation

Can be implemented as a combinational circuit using n full adders called the Ripple Carry Adder

ARCHITECTURE

ARITHMETIC EQUATION

2n cout + S = A + B + cin

2n cout + Σn-1i=0 2i si

= Σn-1i=0 2iai+ Σn-1i=0 2ibi + cin

= Σn-1i=0 2i (ai + bi) + cin

2ci+1 + si = ai + bi+ ci ; I = 0,1..n-1
where c0 = cin and cout = cn





LOGICAL EQUATION


gi=ai bi

pi=ai  bi

si=pi  ci

Ci+1=gi + pi ci ; I = 0,1…n-1
where c0 = cin & cout =cn




Complexity Of CPA !!!

CPA(Carry propagate Adder) Vs CSA (Carry Save Adder)
Comparison (CPA vs CSA)
The two resulting adder arrays are similar in hardware requirements, logic structure and critical path lengths

Bit arrival time in the CPA is unequal (higher bit arrives later than the lower bits)

Comparatively slow

Why Carry Propagate Adder ?
Performs carry propagation from each bit to higher bit positions

Addition results have to be converted to irredundant integer representation

Does not occupy a significant area of the chip

Less Power Consumption




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