embedded FPGA
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Active In SP

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Joined: Aug 2010
21-09-2010, 07:15 PM

please send me the seminar and presentation on the 'embedded FPGA ' topic.
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Active In SP

Posts: 2,270
Joined: Sep 2010
23-09-2010, 11:59 AM

More Info About embedded FPGA

Architecture Description

Field-Programmable Gate Arrays (FPGAs) are flexible and reusable high-density circuits that can be (re)configured by the designer, enabling the VLSI design/validation/ simulation cycle to be performed more quickly and cheaply. The flexibility provided by FPGAs cause a substantial performance penalty due to non-specialized circuit design and signal delay through the programmable routing resources, compared do ASIC designs but FPGAs are still 1000 times faster than circuit simulators. This core provides plural of high-speed reprogrammable logic. This FPGA has regular structure and consists of three configurable elements: Look-Up-Tables (LUTs), each with 8 inputs and 2 outputs, full 4b adders and Input-Output Cells (IOCs). It logic size is aproximately equal to 1500 Virtex LUTs. The development system offers fully automated logic placement and routing (more about P&R software can be found in FPGA P&R Software document). Every non-adder function is stored in static memory array, called LUT, during programing phase. Also connections are established to match desired schematics. Programing data should be supplied by any external data source, e.g. main memory, disk, processor built. NOTE: This version does not support multiple FPGA connection, but FPGA design can be easily adopted, connecting status registers in Input Output Logic module. There is also no tristate support. Full specification Fpga.pdf (84k). More information about the WISHBONE SoC and a full specification can be found here.

refered by opencores

More Info About embedded FPGA


It introduces an energy-efficient F P G A module, intended for embedded implementations. The main features of the proposed cell include a rich local-interconnect network, which drastically reduces the energy dissipated in the wiring, and a dual -voltage s cheme that allows pass-transistor networks to operate at low-voltages yet maintains decent performance. Simulations on a benchmark set demonstrate that the proposed module succeeds in its goal of reducing energy consumption by an order of magnitude over existing implementations.

refered by
Kusse, E.; Rabaey, J.;
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

This paper appears in: Low Power Electronics and Design, 1998. Proceedings. 1998 International Symposium on
Issue Date: 10-12 Aug 1998
On page(s): 155 - 160
Print ISBN: 1-58113-059-7
INSPEC Accession Number: 6127596
Digital Object Identifier: 10.1109/LPE.1998.136265
Date of Current Version: 23 May 2005

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